mirror of
https://github.com/facebookresearch/pytorch3d.git
synced 2025-12-20 22:30:35 +08:00
cpp support for packed to padded
Summary: Cpu implementation for packed to padded and added gradients ``` Benchmark Avg Time(μs) Peak Time(μs) Iterations -------------------------------------------------------------------------------- PACKED_TO_PADDED_2_100_300_1_cpu 138 221 3625 PACKED_TO_PADDED_2_100_300_1_cuda:0 184 261 2716 PACKED_TO_PADDED_2_100_300_16_cpu 555 726 901 PACKED_TO_PADDED_2_100_300_16_cuda:0 179 260 2794 PACKED_TO_PADDED_2_100_3000_1_cpu 396 519 1262 PACKED_TO_PADDED_2_100_3000_1_cuda:0 181 274 2764 PACKED_TO_PADDED_2_100_3000_16_cpu 4517 5003 111 PACKED_TO_PADDED_2_100_3000_16_cuda:0 224 397 2235 PACKED_TO_PADDED_2_1000_300_1_cpu 138 212 3616 PACKED_TO_PADDED_2_1000_300_1_cuda:0 180 282 2775 PACKED_TO_PADDED_2_1000_300_16_cpu 565 711 885 PACKED_TO_PADDED_2_1000_300_16_cuda:0 179 264 2797 PACKED_TO_PADDED_2_1000_3000_1_cpu 389 494 1287 PACKED_TO_PADDED_2_1000_3000_1_cuda:0 180 271 2777 PACKED_TO_PADDED_2_1000_3000_16_cpu 4522 5170 111 PACKED_TO_PADDED_2_1000_3000_16_cuda:0 216 286 2313 PACKED_TO_PADDED_10_100_300_1_cpu 251 345 1995 PACKED_TO_PADDED_10_100_300_1_cuda:0 178 262 2806 PACKED_TO_PADDED_10_100_300_16_cpu 2354 2750 213 PACKED_TO_PADDED_10_100_300_16_cuda:0 178 291 2814 PACKED_TO_PADDED_10_100_3000_1_cpu 1519 1786 330 PACKED_TO_PADDED_10_100_3000_1_cuda:0 179 237 2791 PACKED_TO_PADDED_10_100_3000_16_cpu 24705 25879 21 PACKED_TO_PADDED_10_100_3000_16_cuda:0 228 316 2191 PACKED_TO_PADDED_10_1000_300_1_cpu 261 432 1919 PACKED_TO_PADDED_10_1000_300_1_cuda:0 181 261 2756 PACKED_TO_PADDED_10_1000_300_16_cpu 2349 2770 213 PACKED_TO_PADDED_10_1000_300_16_cuda:0 180 256 2782 PACKED_TO_PADDED_10_1000_3000_1_cpu 1613 1929 310 PACKED_TO_PADDED_10_1000_3000_1_cuda:0 183 253 2739 PACKED_TO_PADDED_10_1000_3000_16_cpu 22041 23653 23 PACKED_TO_PADDED_10_1000_3000_16_cuda:0 220 343 2270 PACKED_TO_PADDED_32_100_300_1_cpu 555 750 901 PACKED_TO_PADDED_32_100_300_1_cuda:0 188 282 2661 PACKED_TO_PADDED_32_100_300_16_cpu 7550 8131 67 PACKED_TO_PADDED_32_100_300_16_cuda:0 181 272 2770 PACKED_TO_PADDED_32_100_3000_1_cpu 4574 6327 110 PACKED_TO_PADDED_32_100_3000_1_cuda:0 173 254 2884 PACKED_TO_PADDED_32_100_3000_16_cpu 70366 72563 8 PACKED_TO_PADDED_32_100_3000_16_cuda:0 349 654 1433 PACKED_TO_PADDED_32_1000_300_1_cpu 612 728 818 PACKED_TO_PADDED_32_1000_300_1_cuda:0 189 295 2647 PACKED_TO_PADDED_32_1000_300_16_cpu 7699 8254 65 PACKED_TO_PADDED_32_1000_300_16_cuda:0 189 311 2646 PACKED_TO_PADDED_32_1000_3000_1_cpu 5105 5261 98 PACKED_TO_PADDED_32_1000_3000_1_cuda:0 191 260 2625 PACKED_TO_PADDED_32_1000_3000_16_cpu 87073 92708 6 PACKED_TO_PADDED_32_1000_3000_16_cuda:0 344 425 1455 -------------------------------------------------------------------------------- Benchmark Avg Time(μs) Peak Time(μs) Iterations -------------------------------------------------------------------------------- PACKED_TO_PADDED_TORCH_2_100_300_1_cpu 492 627 1016 PACKED_TO_PADDED_TORCH_2_100_300_1_cuda:0 768 975 652 PACKED_TO_PADDED_TORCH_2_100_300_16_cpu 659 804 760 PACKED_TO_PADDED_TORCH_2_100_300_16_cuda:0 781 918 641 PACKED_TO_PADDED_TORCH_2_100_3000_1_cpu 624 734 802 PACKED_TO_PADDED_TORCH_2_100_3000_1_cuda:0 778 929 643 PACKED_TO_PADDED_TORCH_2_100_3000_16_cpu 2609 2850 192 PACKED_TO_PADDED_TORCH_2_100_3000_16_cuda:0 758 901 660 PACKED_TO_PADDED_TORCH_2_1000_300_1_cpu 467 612 1072 PACKED_TO_PADDED_TORCH_2_1000_300_1_cuda:0 772 905 648 PACKED_TO_PADDED_TORCH_2_1000_300_16_cpu 689 839 726 PACKED_TO_PADDED_TORCH_2_1000_300_16_cuda:0 789 1143 635 PACKED_TO_PADDED_TORCH_2_1000_3000_1_cpu 629 735 795 PACKED_TO_PADDED_TORCH_2_1000_3000_1_cuda:0 812 916 616 PACKED_TO_PADDED_TORCH_2_1000_3000_16_cpu 2716 3117 185 PACKED_TO_PADDED_TORCH_2_1000_3000_16_cuda:0 844 1288 593 PACKED_TO_PADDED_TORCH_10_100_300_1_cpu 2387 2557 210 PACKED_TO_PADDED_TORCH_10_100_300_1_cuda:0 4112 4993 122 PACKED_TO_PADDED_TORCH_10_100_300_16_cpu 3385 4254 148 PACKED_TO_PADDED_TORCH_10_100_300_16_cuda:0 3959 4902 127 PACKED_TO_PADDED_TORCH_10_100_3000_1_cpu 2918 3105 172 PACKED_TO_PADDED_TORCH_10_100_3000_1_cuda:0 4054 4450 124 PACKED_TO_PADDED_TORCH_10_100_3000_16_cpu 12748 13623 40 PACKED_TO_PADDED_TORCH_10_100_3000_16_cuda:0 4023 4395 125 PACKED_TO_PADDED_TORCH_10_1000_300_1_cpu 2258 2492 222 PACKED_TO_PADDED_TORCH_10_1000_300_1_cuda:0 3997 4312 126 PACKED_TO_PADDED_TORCH_10_1000_300_16_cpu 3404 3597 147 PACKED_TO_PADDED_TORCH_10_1000_300_16_cuda:0 3877 4227 129 PACKED_TO_PADDED_TORCH_10_1000_3000_1_cpu 2789 3054 180 PACKED_TO_PADDED_TORCH_10_1000_3000_1_cuda:0 3821 4402 131 PACKED_TO_PADDED_TORCH_10_1000_3000_16_cpu 11967 12963 42 PACKED_TO_PADDED_TORCH_10_1000_3000_16_cuda:0 3729 4290 135 PACKED_TO_PADDED_TORCH_32_100_300_1_cpu 6933 8152 73 PACKED_TO_PADDED_TORCH_32_100_300_1_cuda:0 11856 12287 43 PACKED_TO_PADDED_TORCH_32_100_300_16_cpu 9895 11205 51 PACKED_TO_PADDED_TORCH_32_100_300_16_cuda:0 12354 13596 41 PACKED_TO_PADDED_TORCH_32_100_3000_1_cpu 9516 10128 53 PACKED_TO_PADDED_TORCH_32_100_3000_1_cuda:0 12917 13597 39 PACKED_TO_PADDED_TORCH_32_100_3000_16_cpu 41209 43783 13 PACKED_TO_PADDED_TORCH_32_100_3000_16_cuda:0 12210 13288 41 PACKED_TO_PADDED_TORCH_32_1000_300_1_cpu 7179 7689 70 PACKED_TO_PADDED_TORCH_32_1000_300_1_cuda:0 11896 12381 43 PACKED_TO_PADDED_TORCH_32_1000_300_16_cpu 10127 15494 50 PACKED_TO_PADDED_TORCH_32_1000_300_16_cuda:0 12034 12817 42 PACKED_TO_PADDED_TORCH_32_1000_3000_1_cpu 8743 10251 58 PACKED_TO_PADDED_TORCH_32_1000_3000_1_cuda:0 12023 12908 42 PACKED_TO_PADDED_TORCH_32_1000_3000_16_cpu 39071 41777 13 PACKED_TO_PADDED_TORCH_32_1000_3000_16_cuda:0 11999 13690 42 -------------------------------------------------------------------------------- ``` Reviewed By: bottler, nikhilaravi, jcjohnson Differential Revision: D19870575 fbshipit-source-id: 23a2477b73373c411899633386c87ab034c3702a
This commit is contained in:
Georgia Gkioxari
committed by
Facebook Github Bot
Facebook Github Bot
parent
8301163d24
commit
60f3c4e7d2
@@ -10,7 +10,8 @@
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PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
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m.def("face_areas_normals", &FaceAreasNormals);
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m.def("packed_to_padded_tensor", &packed_to_padded_tensor);
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m.def("packed_to_padded", &PackedToPadded);
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m.def("padded_to_packed", &PaddedToPacked);
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m.def("nn_points_idx", &NearestNeighborIdx);
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m.def("gather_scatter", &gather_scatter);
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m.def("rasterize_points", &RasterizePoints);
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@@ -21,10 +21,12 @@ std::tuple<at::Tensor, at::Tensor> FaceAreasNormalsCpu(
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at::Tensor verts,
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at::Tensor faces);
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#ifdef WITH_CUDA
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// Cuda implementation.
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std::tuple<at::Tensor, at::Tensor> FaceAreasNormalsCuda(
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at::Tensor verts,
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at::Tensor faces);
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#endif
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// Implementation which is exposed.
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std::tuple<at::Tensor, at::Tensor> FaceAreasNormals(
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@@ -22,8 +22,10 @@
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// CPU implementation.
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at::Tensor NearestNeighborIdxCpu(at::Tensor p1, at::Tensor p2);
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#ifdef WITH_CUDA
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// Cuda implementation.
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at::Tensor NearestNeighborIdxCuda(at::Tensor p1, at::Tensor p2);
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#endif
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// Implementation which is exposed.
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at::Tensor NearestNeighborIdx(at::Tensor p1, at::Tensor p2) {
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@@ -1,11 +1,42 @@
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// Copyright (c) Facebook, Inc. and its affiliates. All rights reserved.
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#include <ATen/ATen.h>
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#include <torch/extension.h>
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// Kernel for inputs_packed of shape (F, D), where D > 1
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template <typename scalar_t>
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__global__ void packed_to_padded_tensor_kernel(
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const scalar_t* __restrict__ inputs,
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const long* __restrict__ first_idxs,
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__global__ void PackedToPaddedKernel(
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const scalar_t* __restrict__ inputs_packed,
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const int64_t* __restrict__ first_idxs,
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scalar_t* __restrict__ inputs_padded,
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const size_t batch_size,
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const size_t max_size,
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const size_t num_inputs,
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const size_t D) {
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// Batch elements split evenly across blocks (num blocks = batch_size) and
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// values for each element split across threads in the block. Each thread adds
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// the values of its respective input elements to the global inputs_padded
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// tensor.
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const size_t tid = threadIdx.x;
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const size_t batch_idx = blockIdx.x;
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const int64_t start = first_idxs[batch_idx];
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const int64_t end =
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batch_idx + 1 < batch_size ? first_idxs[batch_idx + 1] : num_inputs;
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const int num = end - start;
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for (size_t f = tid; f < num; f += blockDim.x) {
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for (size_t j = 0; j < D; ++j) {
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inputs_padded[batch_idx * max_size * D + f * D + j] =
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inputs_packed[(start + f) * D + j];
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}
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}
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}
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// Kernel for inputs of shape (F, 1)
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template <typename scalar_t>
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__global__ void PackedToPaddedKernelD1(
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const scalar_t* __restrict__ inputs_packed,
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const int64_t* __restrict__ first_idxs,
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scalar_t* __restrict__ inputs_padded,
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const size_t batch_size,
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const size_t max_size,
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@@ -17,36 +48,155 @@ __global__ void packed_to_padded_tensor_kernel(
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const size_t tid = threadIdx.x;
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const size_t batch_idx = blockIdx.x;
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const long start = first_idxs[batch_idx];
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const long end =
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const int64_t start = first_idxs[batch_idx];
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const int64_t end =
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batch_idx + 1 < batch_size ? first_idxs[batch_idx + 1] : num_inputs;
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const int num_faces = end - start;
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for (size_t f = tid; f < num_faces; f += blockDim.x) {
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inputs_padded[batch_idx * max_size + f] = inputs[start + f];
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const int num = end - start;
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for (size_t f = tid; f < num; f += blockDim.x) {
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inputs_padded[batch_idx * max_size + f] = inputs_packed[start + f];
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}
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}
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at::Tensor packed_to_padded_tensor_cuda(
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at::Tensor inputs,
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at::Tensor first_idxs,
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const long max_size) {
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const auto num_inputs = inputs.size(0);
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const auto batch_size = first_idxs.size(0);
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// Kernel for inputs_padded of shape (B, F, D), where D > 1
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template <typename scalar_t>
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__global__ void PaddedToPackedKernel(
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const scalar_t* __restrict__ inputs_padded,
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const int64_t* __restrict__ first_idxs,
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scalar_t* __restrict__ inputs_packed,
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const size_t batch_size,
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const size_t max_size,
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const size_t num_inputs,
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const size_t D) {
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// Batch elements split evenly across blocks (num blocks = batch_size) and
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// values for each element split across threads in the block. Each thread adds
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// the values of its respective input elements to the global inputs_packed
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// tensor.
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const size_t tid = threadIdx.x;
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const size_t batch_idx = blockIdx.x;
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const int64_t start = first_idxs[batch_idx];
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const int64_t end =
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batch_idx + 1 < batch_size ? first_idxs[batch_idx + 1] : num_inputs;
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const int num = end - start;
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for (size_t f = tid; f < num; f += blockDim.x) {
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for (size_t j = 0; j < D; ++j) {
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inputs_packed[(start + f) * D + j] =
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inputs_padded[batch_idx * max_size * D + f * D + j];
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}
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}
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}
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// Kernel for inputs_padded of shape (B, F, 1)
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template <typename scalar_t>
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__global__ void PaddedToPackedKernelD1(
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const scalar_t* __restrict__ inputs_padded,
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const int64_t* __restrict__ first_idxs,
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scalar_t* __restrict__ inputs_packed,
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const size_t batch_size,
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const size_t max_size,
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const size_t num_inputs) {
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// Batch elements split evenly across blocks (num blocks = batch_size) and
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// values for each element split across threads in the block. Each thread adds
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// the values of its respective input elements to the global inputs_packed
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// tensor.
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const size_t tid = threadIdx.x;
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const size_t batch_idx = blockIdx.x;
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const int64_t start = first_idxs[batch_idx];
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const int64_t end =
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batch_idx + 1 < batch_size ? first_idxs[batch_idx + 1] : num_inputs;
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const int num = end - start;
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for (size_t f = tid; f < num; f += blockDim.x) {
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inputs_packed[start + f] = inputs_padded[batch_idx * max_size + f];
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}
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}
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at::Tensor PackedToPaddedCuda(
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const at::Tensor inputs_packed,
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const at::Tensor first_idxs,
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const int64_t max_size) {
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const int64_t num_inputs = inputs_packed.size(0);
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const int64_t batch_size = first_idxs.size(0);
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AT_ASSERTM(
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inputs_packed.dim() == 2, "inputs_packed must be a 2-dimensional tensor");
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const int64_t D = inputs_packed.size(1);
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at::Tensor inputs_padded =
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at::zeros({batch_size, max_size}, inputs.options());
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at::zeros({batch_size, max_size, D}, inputs_packed.options());
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const int threads = 512;
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const int blocks = batch_size;
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AT_DISPATCH_FLOATING_TYPES(
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inputs.type(), "packed_to_padded_tensor_kernel", ([&] {
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packed_to_padded_tensor_kernel<scalar_t><<<blocks, threads>>>(
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inputs.data_ptr<scalar_t>(),
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first_idxs.data_ptr<long>(),
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inputs_padded.data_ptr<scalar_t>(),
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batch_size,
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max_size,
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num_inputs);
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}));
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if (D == 1) {
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AT_DISPATCH_FLOATING_TYPES(
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inputs_packed.type(), "packed_to_padded_d1_kernel", ([&] {
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PackedToPaddedKernelD1<scalar_t><<<blocks, threads>>>(
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inputs_packed.data_ptr<scalar_t>(),
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first_idxs.data_ptr<int64_t>(),
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inputs_padded.data_ptr<scalar_t>(),
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batch_size,
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max_size,
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num_inputs);
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}));
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} else {
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AT_DISPATCH_FLOATING_TYPES(
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inputs_packed.type(), "packed_to_padded_kernel", ([&] {
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PackedToPaddedKernel<scalar_t><<<blocks, threads>>>(
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inputs_packed.data_ptr<scalar_t>(),
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first_idxs.data_ptr<int64_t>(),
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inputs_padded.data_ptr<scalar_t>(),
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batch_size,
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max_size,
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num_inputs,
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D);
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}));
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}
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return inputs_padded;
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}
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at::Tensor PaddedToPackedCuda(
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const at::Tensor inputs_padded,
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const at::Tensor first_idxs,
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const int64_t num_inputs) {
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const int64_t batch_size = inputs_padded.size(0);
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const int64_t max_size = inputs_padded.size(1);
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AT_ASSERTM(batch_size == first_idxs.size(0), "sizes mismatch");
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AT_ASSERTM(
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inputs_padded.dim() == 3,
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"inputs_padded must be a 3-dimensional tensor");
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const int64_t D = inputs_padded.size(2);
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at::Tensor inputs_packed =
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at::zeros({num_inputs, D}, inputs_padded.options());
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const int threads = 512;
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const int blocks = batch_size;
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if (D == 1) {
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AT_DISPATCH_FLOATING_TYPES(
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inputs_padded.type(), "padded_to_packed_d1_kernel", ([&] {
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PaddedToPackedKernelD1<scalar_t><<<blocks, threads>>>(
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inputs_padded.data_ptr<scalar_t>(),
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first_idxs.data_ptr<int64_t>(),
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inputs_packed.data_ptr<scalar_t>(),
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batch_size,
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max_size,
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num_inputs);
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}));
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} else {
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AT_DISPATCH_FLOATING_TYPES(
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inputs_padded.type(), "padded_to_packed_kernel", ([&] {
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PaddedToPackedKernel<scalar_t><<<blocks, threads>>>(
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inputs_padded.data_ptr<scalar_t>(),
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first_idxs.data_ptr<int64_t>(),
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inputs_packed.data_ptr<scalar_t>(),
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batch_size,
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max_size,
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num_inputs,
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D);
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}));
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}
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return inputs_packed;
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}
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@@ -3,42 +3,96 @@
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#pragma once
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#include <torch/extension.h>
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// PackedToPadded
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// Converts a packed tensor into a padded tensor, restoring the batch dimension.
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// Refer to pytorch3d/structures/meshes.py for details on packed/padded tensors.
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//
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// Inputs:
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// inputs: FloatTensor of shape (F,), representing the packed batch tensor.
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// e.g. areas for faces in a batch of meshes.
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// inputs_packed: FloatTensor of shape (F, D), representing the packed batch
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// tensor, e.g. areas for faces in a batch of meshes.
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// first_idxs: LongTensor of shape (N,) where N is the number of
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// elements in the batch and `packed_first_idxs[i] = f`
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// elements in the batch and `first_idxs[i] = f`
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// means that the inputs for batch element i begin at
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// `inputs[f]`.
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// max_size: Max length of an element in the batch.
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// max_size: Max length of an element in the batch.
|
||||
// Returns:
|
||||
// inputs_padded: FloatTensor of shape (N, max_size) where max_size is max
|
||||
// inputs_padded: FloatTensor of shape (N, max_size, D) where max_size is max
|
||||
// of `sizes`. The values for batch element i which start at
|
||||
// `inputs[packed_first_idxs[i]]` will be copied to
|
||||
// `inputs_padded[i, :]``, with zeros padding out the extra
|
||||
// `inputs_packed[first_idxs[i]]` will be copied to
|
||||
// `inputs_padded[i, :]`, with zeros padding out the extra
|
||||
// inputs.
|
||||
//
|
||||
|
||||
// PaddedToPacked
|
||||
// Converts a padded tensor into a packed tensor.
|
||||
// Refer to pytorch3d/structures/meshes.py for details on packed/padded tensors.
|
||||
//
|
||||
// Inputs:
|
||||
// inputs_padded: FloatTensor of shape (N, max_size, D), representing the
|
||||
// padded tensor, e.g. areas for faces in a batch of meshes.
|
||||
// first_idxs: LongTensor of shape (N,) where N is the number of
|
||||
// elements in the batch and `first_idxs[i] = f`
|
||||
// means that the inputs for batch element i begin at
|
||||
// `inputs_packed[f]`.
|
||||
// num_inputs: Number of packed entries (= F)
|
||||
// Returns:
|
||||
// inputs_packed: FloatTensor of shape (F, D), where
|
||||
// `inputs_packed[first_idx[i]:] = inputs_padded[i, :]`.
|
||||
//
|
||||
//
|
||||
|
||||
// Cpu implementation.
|
||||
at::Tensor PackedToPaddedCpu(
|
||||
const at::Tensor inputs_packed,
|
||||
const at::Tensor first_idxs,
|
||||
const int64_t max_size);
|
||||
|
||||
// Cpu implementation.
|
||||
at::Tensor PaddedToPackedCpu(
|
||||
const at::Tensor inputs_padded,
|
||||
const at::Tensor first_idxs,
|
||||
const int64_t num_inputs);
|
||||
|
||||
#ifdef WITH_CUDA
|
||||
// Cuda implementation.
|
||||
at::Tensor packed_to_padded_tensor_cuda(
|
||||
at::Tensor inputs,
|
||||
at::Tensor first_idxs,
|
||||
const long max_size);
|
||||
at::Tensor PackedToPaddedCuda(
|
||||
const at::Tensor inputs_packed,
|
||||
const at::Tensor first_idxs,
|
||||
const int64_t max_size);
|
||||
|
||||
// Cuda implementation.
|
||||
at::Tensor PaddedToPackedCuda(
|
||||
const at::Tensor inputs_padded,
|
||||
const at::Tensor first_idxs,
|
||||
const int64_t num_inputs);
|
||||
#endif
|
||||
|
||||
// Implementation which is exposed.
|
||||
at::Tensor packed_to_padded_tensor(
|
||||
at::Tensor inputs,
|
||||
at::Tensor first_idxs,
|
||||
const long max_size) {
|
||||
if (inputs.type().is_cuda()) {
|
||||
at::Tensor PackedToPadded(
|
||||
const at::Tensor inputs_packed,
|
||||
const at::Tensor first_idxs,
|
||||
const int64_t max_size) {
|
||||
if (inputs_packed.type().is_cuda()) {
|
||||
#ifdef WITH_CUDA
|
||||
return packed_to_padded_tensor_cuda(inputs, first_idxs, max_size);
|
||||
return PackedToPaddedCuda(inputs_packed, first_idxs, max_size);
|
||||
#else
|
||||
AT_ERROR("Not compiled with GPU support.");
|
||||
#endif
|
||||
}
|
||||
AT_ERROR("Not implemented on the CPU.");
|
||||
return PackedToPaddedCpu(inputs_packed, first_idxs, max_size);
|
||||
}
|
||||
|
||||
// Implementation which is exposed.
|
||||
at::Tensor PaddedToPacked(
|
||||
const at::Tensor inputs_padded,
|
||||
const at::Tensor first_idxs,
|
||||
const int64_t num_inputs) {
|
||||
if (inputs_padded.type().is_cuda()) {
|
||||
#ifdef WITH_CUDA
|
||||
return PaddedToPackedCuda(inputs_padded, first_idxs, num_inputs);
|
||||
#else
|
||||
AT_ERROR("Not compiled with GPU support.");
|
||||
#endif
|
||||
}
|
||||
return PaddedToPackedCpu(inputs_padded, first_idxs, num_inputs);
|
||||
}
|
||||
|
||||
@@ -0,0 +1,65 @@
|
||||
// Copyright (c) Facebook, Inc. and its affiliates. All rights reserved.
|
||||
|
||||
#include <torch/extension.h>
|
||||
|
||||
at::Tensor PackedToPaddedCpu(
|
||||
const at::Tensor inputs_packed,
|
||||
const at::Tensor first_idxs,
|
||||
const int64_t max_size) {
|
||||
const int64_t num_inputs = inputs_packed.size(0);
|
||||
const int64_t batch_size = first_idxs.size(0);
|
||||
|
||||
AT_ASSERTM(
|
||||
inputs_packed.dim() == 2, "inputs_packed must be a 2-dimensional tensor");
|
||||
const int64_t D = inputs_packed.size(1);
|
||||
|
||||
torch::Tensor inputs_padded =
|
||||
torch::zeros({batch_size, max_size, D}, inputs_packed.options());
|
||||
|
||||
auto inputs_packed_a = inputs_packed.accessor<float, 2>();
|
||||
auto first_idxs_a = first_idxs.accessor<int64_t, 1>();
|
||||
auto inputs_padded_a = inputs_padded.accessor<float, 3>();
|
||||
|
||||
for (int b = 0; b < batch_size; ++b) {
|
||||
const int64_t start = first_idxs_a[b];
|
||||
const int64_t end = b + 1 < batch_size ? first_idxs_a[b + 1] : num_inputs;
|
||||
const int64_t num = end - start;
|
||||
for (int i = 0; i < num; ++i) {
|
||||
for (int j = 0; j < D; ++j) {
|
||||
inputs_padded_a[b][i][j] = inputs_packed_a[start + i][j];
|
||||
}
|
||||
}
|
||||
}
|
||||
return inputs_padded;
|
||||
}
|
||||
|
||||
at::Tensor PaddedToPackedCpu(
|
||||
const at::Tensor inputs_padded,
|
||||
const at::Tensor first_idxs,
|
||||
const int64_t num_inputs) {
|
||||
const int64_t batch_size = inputs_padded.size(0);
|
||||
const int64_t max_size = inputs_padded.size(1);
|
||||
|
||||
AT_ASSERTM(
|
||||
inputs_padded.dim() == 3, "inputs_padded must be a 3-dimensional tensor");
|
||||
const int64_t D = inputs_padded.size(2);
|
||||
|
||||
torch::Tensor inputs_packed =
|
||||
torch::zeros({num_inputs, D}, inputs_padded.options());
|
||||
|
||||
auto inputs_padded_a = inputs_padded.accessor<float, 3>();
|
||||
auto first_idxs_a = first_idxs.accessor<int64_t, 1>();
|
||||
auto inputs_packed_a = inputs_packed.accessor<float, 2>();
|
||||
|
||||
for (int b = 0; b < batch_size; ++b) {
|
||||
const int64_t start = first_idxs_a[b];
|
||||
const int64_t end = b + 1 < batch_size ? first_idxs_a[b + 1] : num_inputs;
|
||||
const int64_t num = end - start;
|
||||
for (int i = 0; i < num; ++i) {
|
||||
for (int j = 0; j < D; ++j) {
|
||||
inputs_packed_a[start + i][j] = inputs_padded_a[b][i][j];
|
||||
}
|
||||
}
|
||||
}
|
||||
return inputs_packed;
|
||||
}
|
||||
Reference in New Issue
Block a user