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https://github.com/facebookresearch/pytorch3d.git
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type() deprecated
Summary: Replace `tensor.type().is_cuda()` with the preferred `tensor.is_cuda()`. Replace `AT_DISPATCH_FLOATING_TYPES(tensor.type(), ...` with `AT_DISPATCH_FLOATING_TYPES(tensor.scalar_type(), ...`. These avoid deprecation warnings in future pytorch. Reviewed By: nikhilaravi Differential Revision: D20646565 fbshipit-source-id: 1a0c15978c871af816b1dd7d4a7ea78242abd95e
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@ -58,7 +58,7 @@ torch::Tensor alphaCompositeForward(
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alphas = alphas.contiguous();
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points_idx = points_idx.contiguous();
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if (features.type().is_cuda()) {
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if (features.is_cuda()) {
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#ifdef WITH_CUDA
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CHECK_CONTIGUOUS_CUDA(features);
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CHECK_CONTIGUOUS_CUDA(alphas);
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@ -86,7 +86,7 @@ std::tuple<torch::Tensor, torch::Tensor> alphaCompositeBackward(
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alphas = alphas.contiguous();
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points_idx = points_idx.contiguous();
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if (grad_outputs.type().is_cuda()) {
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if (grad_outputs.is_cuda()) {
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#ifdef WITH_CUDA
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CHECK_CONTIGUOUS_CUDA(grad_outputs);
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CHECK_CONTIGUOUS_CUDA(features);
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@ -56,7 +56,7 @@ torch::Tensor weightedSumNormForward(
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alphas = alphas.contiguous();
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points_idx = points_idx.contiguous();
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if (features.type().is_cuda()) {
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if (features.is_cuda()) {
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#ifdef WITH_CUDA
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CHECK_CONTIGUOUS_CUDA(features);
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CHECK_CONTIGUOUS_CUDA(alphas);
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@ -85,7 +85,7 @@ std::tuple<torch::Tensor, torch::Tensor> weightedSumNormBackward(
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alphas = alphas.contiguous();
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points_idx = points_idx.contiguous();
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if (grad_outputs.type().is_cuda()) {
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if (grad_outputs.is_cuda()) {
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#ifdef WITH_CUDA
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CHECK_CONTIGUOUS_CUDA(grad_outputs);
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CHECK_CONTIGUOUS_CUDA(features);
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@ -56,7 +56,7 @@ torch::Tensor weightedSumForward(
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alphas = alphas.contiguous();
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points_idx = points_idx.contiguous();
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if (features.type().is_cuda()) {
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if (features.is_cuda()) {
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#ifdef WITH_CUDA
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CHECK_CONTIGUOUS_CUDA(features);
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CHECK_CONTIGUOUS_CUDA(alphas);
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@ -84,7 +84,7 @@ std::tuple<torch::Tensor, torch::Tensor> weightedSumBackward(
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alphas = alphas.contiguous();
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points_idx = points_idx.contiguous();
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if (grad_outputs.type().is_cuda()) {
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if (grad_outputs.is_cuda()) {
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#ifdef WITH_CUDA
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CHECK_CONTIGUOUS_CUDA(grad_outputs);
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CHECK_CONTIGUOUS_CUDA(features);
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@ -219,7 +219,7 @@ std::tuple<at::Tensor, at::Tensor> FaceAreasNormalsForwardCuda(
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const int blocks = 64;
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const int threads = 512;
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AT_DISPATCH_FLOATING_TYPES(
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verts.type(), "face_areas_normals_forward_cuda", ([&] {
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verts.scalar_type(), "face_areas_normals_forward_cuda", ([&] {
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FaceAreasNormalsForwardKernel<scalar_t><<<blocks, threads>>>(
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verts.data_ptr<scalar_t>(),
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faces.data_ptr<int64_t>(),
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@ -44,7 +44,7 @@ at::Tensor FaceAreasNormalsBackwardCuda(
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std::tuple<at::Tensor, at::Tensor> FaceAreasNormalsForward(
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const at::Tensor verts,
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const at::Tensor faces) {
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if (verts.type().is_cuda() && faces.type().is_cuda()) {
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if (verts.is_cuda() && faces.is_cuda()) {
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#ifdef WITH_CUDA
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return FaceAreasNormalsForwardCuda(verts, faces);
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#else
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@ -60,7 +60,7 @@ at::Tensor FaceAreasNormalsBackward(
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const at::Tensor grad_normals,
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const at::Tensor verts,
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const at::Tensor faces) {
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if (verts.type().is_cuda() && faces.type().is_cuda()) {
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if (verts.is_cuda() && faces.is_cuda()) {
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#ifdef WITH_CUDA
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return FaceAreasNormalsBackwardCuda(grad_areas, grad_normals, verts, faces);
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#else
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@ -32,7 +32,7 @@ at::Tensor gather_scatter(
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const at::Tensor edges,
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bool directed,
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bool backward) {
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if (input.type().is_cuda() && edges.type().is_cuda()) {
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if (input.is_cuda() && edges.is_cuda()) {
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#ifdef WITH_CUDA
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return gather_scatter_cuda(input, edges, directed, backward);
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#else
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@ -228,22 +228,22 @@ at::Tensor NearestNeighborIdxCuda(at::Tensor p1, at::Tensor p2) {
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if (D == 3) {
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// Use the specialized kernel for D=3.
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AT_DISPATCH_FLOATING_TYPES(p1.type(), "nearest_neighbor_v3_cuda", ([&] {
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size_t shared_size = threads * sizeof(size_t) +
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threads * sizeof(int64_t);
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NearestNeighborKernelD3<scalar_t>
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<<<blocks, threads, shared_size>>>(
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p1.data_ptr<scalar_t>(),
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p2.data_ptr<scalar_t>(),
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idx.data_ptr<int64_t>(),
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N,
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P1,
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P2);
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}));
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AT_DISPATCH_FLOATING_TYPES(
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p1.scalar_type(), "nearest_neighbor_v3_cuda", ([&] {
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size_t shared_size =
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threads * sizeof(size_t) + threads * sizeof(int64_t);
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NearestNeighborKernelD3<scalar_t><<<blocks, threads, shared_size>>>(
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p1.data_ptr<scalar_t>(),
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p2.data_ptr<scalar_t>(),
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idx.data_ptr<int64_t>(),
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N,
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P1,
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P2);
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}));
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} else {
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// Use the general kernel for all other D.
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AT_DISPATCH_FLOATING_TYPES(
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p1.type(), "nearest_neighbor_v3_cuda", ([&] {
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p1.scalar_type(), "nearest_neighbor_v3_cuda", ([&] {
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// To avoid misaligned memory access, the size of shared buffers
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// need to be rounded to the next even size.
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size_t D_2 = D + (D % 2);
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@ -29,7 +29,7 @@ at::Tensor NearestNeighborIdxCuda(at::Tensor p1, at::Tensor p2);
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// Implementation which is exposed.
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at::Tensor NearestNeighborIdx(at::Tensor p1, at::Tensor p2) {
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if (p1.type().is_cuda() && p2.type().is_cuda()) {
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if (p1.is_cuda() && p2.is_cuda()) {
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#ifdef WITH_CUDA
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CHECK_CONTIGUOUS_CUDA(p1);
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CHECK_CONTIGUOUS_CUDA(p2);
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@ -128,7 +128,7 @@ at::Tensor PackedToPaddedCuda(
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const int blocks = batch_size;
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if (D == 1) {
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AT_DISPATCH_FLOATING_TYPES(
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inputs_packed.type(), "packed_to_padded_d1_kernel", ([&] {
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inputs_packed.scalar_type(), "packed_to_padded_d1_kernel", ([&] {
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PackedToPaddedKernelD1<scalar_t><<<blocks, threads>>>(
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inputs_packed.data_ptr<scalar_t>(),
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first_idxs.data_ptr<int64_t>(),
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@ -139,7 +139,7 @@ at::Tensor PackedToPaddedCuda(
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}));
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} else {
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AT_DISPATCH_FLOATING_TYPES(
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inputs_packed.type(), "packed_to_padded_kernel", ([&] {
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inputs_packed.scalar_type(), "packed_to_padded_kernel", ([&] {
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PackedToPaddedKernel<scalar_t><<<blocks, threads>>>(
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inputs_packed.data_ptr<scalar_t>(),
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first_idxs.data_ptr<int64_t>(),
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@ -175,7 +175,7 @@ at::Tensor PaddedToPackedCuda(
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if (D == 1) {
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AT_DISPATCH_FLOATING_TYPES(
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inputs_padded.type(), "padded_to_packed_d1_kernel", ([&] {
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inputs_padded.scalar_type(), "padded_to_packed_d1_kernel", ([&] {
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PaddedToPackedKernelD1<scalar_t><<<blocks, threads>>>(
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inputs_padded.data_ptr<scalar_t>(),
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first_idxs.data_ptr<int64_t>(),
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@ -186,7 +186,7 @@ at::Tensor PaddedToPackedCuda(
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}));
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} else {
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AT_DISPATCH_FLOATING_TYPES(
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inputs_padded.type(), "padded_to_packed_kernel", ([&] {
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inputs_padded.scalar_type(), "padded_to_packed_kernel", ([&] {
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PaddedToPackedKernel<scalar_t><<<blocks, threads>>>(
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inputs_padded.data_ptr<scalar_t>(),
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first_idxs.data_ptr<int64_t>(),
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@ -72,7 +72,7 @@ at::Tensor PackedToPadded(
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const at::Tensor inputs_packed,
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const at::Tensor first_idxs,
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const int64_t max_size) {
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if (inputs_packed.type().is_cuda()) {
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if (inputs_packed.is_cuda()) {
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#ifdef WITH_CUDA
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return PackedToPaddedCuda(inputs_packed, first_idxs, max_size);
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#else
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@ -87,7 +87,7 @@ at::Tensor PaddedToPacked(
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const at::Tensor inputs_padded,
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const at::Tensor first_idxs,
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const int64_t num_inputs) {
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if (inputs_padded.type().is_cuda()) {
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if (inputs_padded.is_cuda()) {
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#ifdef WITH_CUDA
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return PaddedToPackedCuda(inputs_padded, first_idxs, num_inputs);
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#else
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@ -3,8 +3,7 @@
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#pragma once
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#include <torch/extension.h>
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#define CHECK_CUDA(x) \
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AT_ASSERTM(x.type().is_cuda(), #x "must be a CUDA tensor.")
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#define CHECK_CUDA(x) AT_ASSERTM(x.is_cuda(), #x "must be a CUDA tensor.")
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#define CHECK_CONTIGUOUS(x) \
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AT_ASSERTM(x.is_contiguous(), #x "must be contiguous.")
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#define CHECK_CONTIGUOUS_CUDA(x) \
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@ -82,7 +82,7 @@ RasterizeMeshesNaive(
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const int faces_per_pixel,
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const bool perspective_correct) {
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// TODO: Better type checking.
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if (face_verts.type().is_cuda()) {
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if (face_verts.is_cuda()) {
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#ifdef WITH_CUDA
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return RasterizeMeshesNaiveCuda(
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face_verts,
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@ -160,7 +160,7 @@ torch::Tensor RasterizeMeshesBackward(
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const torch::Tensor& grad_bary,
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const torch::Tensor& grad_dists,
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const bool perspective_correct) {
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if (face_verts.type().is_cuda()) {
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if (face_verts.is_cuda()) {
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#ifdef WITH_CUDA
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return RasterizeMeshesBackwardCuda(
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face_verts,
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@ -236,7 +236,7 @@ torch::Tensor RasterizeMeshesCoarse(
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const float blur_radius,
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const int bin_size,
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const int max_faces_per_bin) {
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if (face_verts.type().is_cuda()) {
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if (face_verts.is_cuda()) {
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#ifdef WITH_CUDA
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return RasterizeMeshesCoarseCuda(
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face_verts,
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@ -322,7 +322,7 @@ RasterizeMeshesFine(
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const int bin_size,
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const int faces_per_pixel,
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const bool perspective_correct) {
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if (face_verts.type().is_cuda()) {
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if (face_verts.is_cuda()) {
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#ifdef WITH_CUDA
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return RasterizeMeshesFineCuda(
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face_verts,
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@ -63,8 +63,8 @@ std::tuple<torch::Tensor, torch::Tensor, torch::Tensor> RasterizePointsNaive(
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const int image_size,
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const float radius,
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const int points_per_pixel) {
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if (points.type().is_cuda() && cloud_to_packed_first_idx.type().is_cuda() &&
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num_points_per_cloud.type().is_cuda()) {
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if (points.is_cuda() && cloud_to_packed_first_idx.is_cuda() &&
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num_points_per_cloud.is_cuda()) {
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#ifdef WITH_CUDA
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return RasterizePointsNaiveCuda(
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points,
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@ -137,8 +137,8 @@ torch::Tensor RasterizePointsCoarse(
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const float radius,
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const int bin_size,
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const int max_points_per_bin) {
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if (points.type().is_cuda() && cloud_to_packed_first_idx.type().is_cuda() &&
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num_points_per_cloud.type().is_cuda()) {
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if (points.is_cuda() && cloud_to_packed_first_idx.is_cuda() &&
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num_points_per_cloud.is_cuda()) {
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#ifdef WITH_CUDA
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return RasterizePointsCoarseCuda(
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points,
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@ -206,7 +206,7 @@ std::tuple<torch::Tensor, torch::Tensor, torch::Tensor> RasterizePointsFine(
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const float radius,
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const int bin_size,
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const int points_per_pixel) {
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if (points.type().is_cuda()) {
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if (points.is_cuda()) {
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#ifdef WITH_CUDA
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return RasterizePointsFineCuda(
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points, bin_points, image_size, radius, bin_size, points_per_pixel);
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@ -255,7 +255,7 @@ torch::Tensor RasterizePointsBackward(
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const torch::Tensor& idxs,
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const torch::Tensor& grad_zbuf,
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const torch::Tensor& grad_dists) {
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if (points.type().is_cuda()) {
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if (points.is_cuda()) {
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#ifdef WITH_CUDA
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return RasterizePointsBackwardCuda(points, idxs, grad_zbuf, grad_dists);
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#else
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